| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_rtc/ |
| D | fsl_rtc.h | 84 base->CTRL &= ~RTC_CTRL_RTC_EN_MASK; in RTC_Deinit()
165 base->CTRL |= RTC_CTRL_RTC1KHZ_EN_MASK; in RTC_EnableWakeupTimer()
169 base->CTRL &= ~RTC_CTRL_RTC1KHZ_EN_MASK; in RTC_EnableWakeupTimer()
183 return (base->CTRL & RTC_CTRL_RTC1KHZ_EN_MASK); in RTC_GetEnabledWakeupTimer()
209 base->CTRL |= RTC_CTRL_RTC_SUBSEC_ENA_MASK; in RTC_EnableSubsecCounter()
213 base->CTRL &= ~RTC_CTRL_RTC_SUBSEC_ENA_MASK; in RTC_EnableSubsecCounter()
300 base->CTRL |= RTC_CTRL_RTC1KHZ_EN_MASK; in RTC_SetWakeupCount()
346 base->CTRL |= RTC_CTRL_WAKEDPD_EN_MASK; in RTC_EnableWakeUpTimerInterruptFromDPD()
350 base->CTRL &= ~RTC_CTRL_WAKEDPD_EN_MASK; in RTC_EnableWakeUpTimerInterruptFromDPD()
366 base->CTRL |= RTC_CTRL_ALARMDPD_EN_MASK; in RTC_EnableAlarmTimerInterruptFromDPD()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/smartcard/ |
| D | fsl_smartcard_emvsim.c | 85 base->CTRL &= ~EMVSIM_CTRL_XMT_EN_MASK; in smartcard_emvsim_CompleteSendData()
89 base->CTRL |= EMVSIM_CTRL_RCV_EN_MASK; in smartcard_emvsim_CompleteSendData()
150 control = base->CTRL; in smartcard_emvsim_StartSendData()
151 base->CTRL = 0u; in smartcard_emvsim_StartSendData()
163 base->CTRL |= EMVSIM_CTRL_RCV_EN_MASK; in smartcard_emvsim_StartSendData()
172 base->CTRL = control & ~(EMVSIM_CTRL_XMT_EN_MASK | EMVSIM_CTRL_RCV_EN_MASK); in smartcard_emvsim_StartSendData()
178 base->CTRL |= EMVSIM_CTRL_FLSH_TX_MASK; in smartcard_emvsim_StartSendData()
181 base->CTRL |= EMVSIM_CTRL_XMT_EN_MASK; in smartcard_emvsim_StartSendData()
205 base->CTRL &= ~EMVSIM_CTRL_XMT_EN_MASK; in smartcard_emvsim_StartReceiveData()
207 base->CTRL |= EMVSIM_CTRL_RCV_EN_MASK; in smartcard_emvsim_StartReceiveData()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/capt/ |
| D | fsl_capt.c | 88 tmp32 = base->CTRL & (CAPT_CTRL_POLLMODE_MASK | CAPT_CTRL_TYPE_MASK in CAPT_Init()
100 while (CAPT_CTRL_INCHANGE_MASK == (CAPT_CTRL_INCHANGE_MASK & base->CTRL)) in CAPT_Init()
103 base->CTRL = tmp32; in CAPT_Init()
125 while (CAPT_CTRL_INCHANGE_MASK == (CAPT_CTRL_INCHANGE_MASK & base->CTRL)) in CAPT_Deinit()
128 base->CTRL &= ~CAPT_CTRL_POLLMODE_MASK; in CAPT_Deinit()
183 while (CAPT_CTRL_INCHANGE_MASK == (CAPT_CTRL_INCHANGE_MASK & base->CTRL)) in CAPT_SetPollMode()
187 base->CTRL &= ~CAPT_CTRL_POLLMODE_MASK; in CAPT_SetPollMode()
188 base->CTRL |= CAPT_CTRL_POLLMODE(mode); in CAPT_SetPollMode()
201 while (CAPT_CTRL_INCHANGE_MASK == (CAPT_CTRL_INCHANGE_MASK & base->CTRL)) in CAPT_EnableDMA()
204 base->CTRL = (base->CTRL & ~CAPT_CTRL_DMA_MASK) | CAPT_CTRL_DMA(mode); in CAPT_EnableDMA()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qdc/ |
| D | fsl_qdc.c | 104 …tmp16 = base->CTRL & (uint16_t)(~(QDC_CTRL_W1C_FLAGS | QDC_CTRL_HIP_MASK | QDC_CTRL_HNE_MASK | QDC… in QDC_Init()
139 base->CTRL = tmp16; in QDC_Init()
283 uint16_t tmp16 = base->CTRL & (uint16_t)(~QDC_CTRL_W1C_FLAGS); in QDC_DoSoftwareLoadInitialPositionValue()
286 base->CTRL = tmp16; in QDC_DoSoftwareLoadInitialPositionValue()
328 uint16_t tmp16 = base->CTRL & (uint16_t)(~(QDC_CTRL_W1C_FLAGS | QDC_CTRL_WDE_MASK)); in QDC_EnableWatchdog()
334 base->CTRL = tmp16; in QDC_EnableWatchdog()
349 if (0U != (QDC_CTRL_HIRQ_MASK & base->CTRL)) in QDC_GetStatusFlags()
353 if (0U != (QDC_CTRL_XIRQ_MASK & base->CTRL)) in QDC_GetStatusFlags()
357 if (0U != (QDC_CTRL_DIRQ_MASK & base->CTRL)) in QDC_GetStatusFlags()
361 if (0U != (QDC_CTRL_CMPIRQ_MASK & base->CTRL)) in QDC_GetStatusFlags()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/enc/ |
| D | fsl_enc.c | 105 …tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_HIP_MASK | ENC_CTRL_HNE_MASK | ENC… in ENC_Init()
140 base->CTRL = tmp16; in ENC_Init()
284 uint16_t tmp16 = base->CTRL & (uint16_t)(~ENC_CTRL_W1C_FLAGS); in ENC_DoSoftwareLoadInitialPositionValue()
287 base->CTRL = tmp16; in ENC_DoSoftwareLoadInitialPositionValue()
329 uint16_t tmp16 = base->CTRL & (uint16_t)(~(ENC_CTRL_W1C_FLAGS | ENC_CTRL_WDE_MASK)); in ENC_EnableWatchdog()
335 base->CTRL = tmp16; in ENC_EnableWatchdog()
350 if (0U != (ENC_CTRL_HIRQ_MASK & base->CTRL)) in ENC_GetStatusFlags()
354 if (0U != (ENC_CTRL_XIRQ_MASK & base->CTRL)) in ENC_GetStatusFlags()
358 if (0U != (ENC_CTRL_DIRQ_MASK & base->CTRL)) in ENC_GetStatusFlags()
362 if (0U != (ENC_CTRL_CMPIRQ_MASK & base->CTRL)) in ENC_GetStatusFlags()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_adc/ |
| D | fsl_adc.c | 122 base->CTRL = tmp32; in ADC_Init()
234 …frequency = CLOCK_GetFreq(kCLOCK_BusClk) / (((base->CTRL & ADC_CTRL_CLKDIV_MASK) >> ADC_CTRL_CLKDI… in ADC_DoSelfCalibration()
237 if (ADC_CTRL_ASYNMODE_MASK == (base->CTRL & ADC_CTRL_ASYNMODE_MASK)) in ADC_DoSelfCalibration()
246 (0U == (base->CTRL & ADC_CTRL_BYPASSCAL_MASK))) in ADC_DoSelfCalibration()
287 uint32_t tmp32 = base->CTRL; in ADC_DoOffsetCalibration()
310 base->CTRL &= ~ADC_CTRL_CLKDIV_MASK; in ADC_DoOffsetCalibration()
311 base->CTRL |= ADC_CTRL_CLKDIV(divider - 1UL); in ADC_DoOffsetCalibration()
326 base->CTRL = tmp32; in ADC_DoOffsetCalibration()
340 base->CTRL = tmp32; in ADC_DoOffsetCalibration()
345 base->CTRL = tmp32; in ADC_DoOffsetCalibration()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/pmc0/ |
| D | fsl_pmc0.h | 600 PMC0->CTRL |= PMC0_CTRL_LVDIE_MASK; in PMC0_EnableLowVoltDetectInterrupt()
611 PMC0->CTRL &= ~PMC0_CTRL_LVDIE_MASK; in PMC0_DisableLowVoltDetectInterrupt()
622 PMC0->CTRL |= PMC0_CTRL_LVDACK_MASK; in PMC0_ClearLowVoltDetectFlag()
633 PMC0->CTRL |= PMC0_CTRL_HVDIE_MASK; in PMC0_EnableHighVoltDetectInterrupt()
644 PMC0->CTRL &= ~PMC0_CTRL_HVDIE_MASK; in PMC0_DisableHighVoltDetectInterrupt()
655 PMC0->CTRL |= PMC0_CTRL_HVDACK_MASK; in PMC0_ClearHighVoltDetectFlag()
669 PMC0->CTRL |= PMC0_CTRL_LVDRE_MASK; in PMC0_EnableLowVoltDetectReset()
673 PMC0->CTRL &= ~PMC0_CTRL_LVDRE_MASK; in PMC0_EnableLowVoltDetectReset()
688 PMC0->CTRL |= PMC0_CTRL_HVDRE_MASK; in PMC0_EnableHighVoltDetectReset()
692 PMC0->CTRL &= ~PMC0_CTRL_HVDRE_MASK; in PMC0_EnableHighVoltDetectReset()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/ |
| D | fsl_power.c | 214 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
216 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
217 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
223 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
258 PMC->CTRL |= PMC_CTRL_OTPSWREN_MASK; /* Enable RBB for OTP switch */ in POWER_EnablePD()
272 PMC->CTRL &= ~PMC_CTRL_OTPSWREN_MASK; /* Disable RBB for OTP switch */ in POWER_DisablePD()
284 …PMC->CTRL &= ~PMC_CTRL_CLKDIVEN_MASK; /* Disable internal clock divider to decrease the PMC regist… in POWER_ApplyPD()
289 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
294 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in POWER_ApplyPD()
321 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/ |
| D | fsl_power.c | 214 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
216 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
217 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
223 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
258 PMC->CTRL |= PMC_CTRL_OTPSWREN_MASK; /* Enable RBB for OTP switch */ in POWER_EnablePD()
272 PMC->CTRL &= ~PMC_CTRL_OTPSWREN_MASK; /* Disable RBB for OTP switch */ in POWER_DisablePD()
284 …PMC->CTRL &= ~PMC_CTRL_CLKDIVEN_MASK; /* Disable internal clock divider to decrease the PMC regist… in POWER_ApplyPD()
289 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
294 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in POWER_ApplyPD()
321 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/ |
| D | fsl_power.c | 214 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
216 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
217 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
223 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
258 PMC->CTRL |= PMC_CTRL_OTPSWREN_MASK; /* Enable RBB for OTP switch */ in POWER_EnablePD()
272 PMC->CTRL &= ~PMC_CTRL_OTPSWREN_MASK; /* Disable RBB for OTP switch */ in POWER_DisablePD()
284 …PMC->CTRL &= ~PMC_CTRL_CLKDIVEN_MASK; /* Disable internal clock divider to decrease the PMC regist… in POWER_ApplyPD()
289 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
294 PMC->CTRL |= PMC_CTRL_CLKDIVEN_MASK; /* Enable internal clock divider for power saving.*/ in POWER_ApplyPD()
321 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/middleware/wireless/framework_5.3.3/XCVR/MKW41Z4/XCVR_Test/ |
| D | xcvr_test_fsk.c | 74 XCVR_TX_DIG->CTRL &= ~(XCVR_TX_DIG_CTRL_DFT_CLK_SEL_MASK | in XcvrFskModTx()
76 XCVR_TX_DIG->CTRL |= XCVR_TX_DIG_CTRL_RADIO_DFT_MODE(gDftTxPattern_c) | in XcvrFskModTx()
79 XCVR_TSM->CTRL |= XCVR_TSM_CTRL_FORCE_TX_EN_MASK; in XcvrFskModTx()
88 XCVR_TX_DIG->CTRL &= ~(XCVR_TX_DIG_CTRL_DFT_CLK_SEL_MASK | in XcvrFskNoModTx()
90 XCVR_TX_DIG->CTRL |= XCVR_TX_DIG_CTRL_RADIO_DFT_MODE(gDftTxNoMod_Carrier_c); in XcvrFskNoModTx()
92 XCVR_TSM->CTRL |= XCVR_TSM_CTRL_FORCE_TX_EN_MASK; in XcvrFskNoModTx()
100 XCVR_TX_DIG->CTRL &= ~(XCVR_TX_DIG_CTRL_TX_DFT_EN_MASK | in XcvrFskIdle()
103 XCVR_TSM->CTRL &= ~XCVR_TSM_CTRL_FORCE_TX_EN_MASK; in XcvrFskIdle()
113 XCVR_TX_DIG->CTRL &= ~(XCVR_TX_DIG_CTRL_DFT_CLK_SEL_MASK | in XcvrFskTxRand()
116 XCVR_TX_DIG->CTRL |= XCVR_TX_DIG_CTRL_RADIO_DFT_MODE(gDftTxRandom_c) | in XcvrFskTxRand()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/eqdc/ |
| D | fsl_eqdc.h | 562 base->CTRL = (base->CTRL & (~EQDC_CTRL_W1C_FLAGS)) | EQDC_CTRL_WDE_MASK; in EQDC_EnableWatchdog()
566 base->CTRL = (base->CTRL & (~(EQDC_CTRL_W1C_FLAGS | EQDC_CTRL_WDE_MASK))); in EQDC_EnableWatchdog()
599 base->CTRL |= EQDC_CTRL_DMAEN_MASK; in EQDC_EnableDMA()
607 base->CTRL &= ~EQDC_CTRL_DMAEN_MASK; in EQDC_EnableDMA()
661 base->CTRL |= EQDC_CTRL_LDOK_MASK; in EQDC_SetEqdcLdok()
671 return base->CTRL & EQDC_CTRL_LDOK_MASK; in EQDC_GetEqdcLdok()
681 base->CTRL &= ~EQDC_CTRL_LDOK_MASK; in EQDC_ClearEqdcLdok()
701 u32Flags = (uint32_t)(base->CTRL) & EQDC_CTRL_INT_FLAGS; in EQDC_GetStatusFlags()
717 base->CTRL = (base->CTRL & (~EQDC_CTRL_W1C_FLAGS)) | (u32Flags & EQDC_CTRL_INT_FLAGS); in EQDC_ClearStatusFlags()
764 base->CTRL = (base->CTRL & (~EQDC_CTRL_W1C_FLAGS)) | (u32Interrupts & EQDC_CTRL_INT_EN); in EQDC_EnableInterrupts()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/bee/ |
| D | fsl_bee.c | 55 base->CTRL = BEE_CTRL_CTRL_SFTRST_N_MASK | BEE_CTRL_CTRL_CLK_EN_MASK; in BEE_Init()
68 base->CTRL &= in BEE_Deinit()
133 if ((base->CTRL & BEE_CTRL_BEE_ENABLE_MASK) != 0U) in BEE_SetConfig()
140 beeCtrlVal = base->CTRL & 0xFFFF0037U; in BEE_SetConfig()
148 base->CTRL = beeCtrlVal; in BEE_SetConfig()
191 base->CTRL &= ~BEE_CTRL_KEY_VALID_MASK; in BEE_SetRegionKey()
197 if (0U == (base->CTRL & BEE_CTRL_BEE_ENABLE_MASK)) in BEE_SetRegionKey()
205 base->CTRL &= ~BEE_CTRL_KEY_REGION_SEL_MASK; in BEE_SetRegionKey()
210 base->CTRL |= BEE_CTRL_KEY_REGION_SEL_MASK; in BEE_SetRegionKey()
219 base->CTRL |= BEE_CTRL_KEY_VALID_MASK; in BEE_SetRegionKey()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/gint/ |
| D | fsl_gint.c | 106 base->CTRL = (GINT_CTRL_COMB(comb) | GINT_CTRL_TRIG(trig)); in GINT_SetCtrl()
132 combValue = (base->CTRL & GINT_CTRL_COMB_MASK) >> GINT_CTRL_COMB_SHIFT; in GINT_GetCtrl()
134 trigValue = (base->CTRL & GINT_CTRL_TRIG_MASK) >> GINT_CTRL_TRIG_SHIFT; in GINT_GetCtrl()
259 s_gintBases[0]->CTRL |= GINT_CTRL_INT_MASK; in GINT0_DriverIRQHandler()
274 s_gintBases[1]->CTRL |= GINT_CTRL_INT_MASK; in GINT1_DriverIRQHandler()
289 s_gintBases[2]->CTRL |= GINT_CTRL_INT_MASK; in GINT2_DriverIRQHandler()
304 s_gintBases[3]->CTRL |= GINT_CTRL_INT_MASK; in GINT3_DriverIRQHandler()
319 s_gintBases[4]->CTRL |= GINT_CTRL_INT_MASK; in GINT4_DriverIRQHandler()
334 s_gintBases[5]->CTRL |= GINT_CTRL_INT_MASK; in GINT5_DriverIRQHandler()
349 s_gintBases[6]->CTRL |= GINT_CTRL_INT_MASK; in GINT6_DriverIRQHandler()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/sfa/ |
| D | fsl_sfa.c | 199 triggerable = ((base->CTRL & SFA_CTRL_SFA_TRIG_MEAS_EN_MASK) != 0U); in SFA_StartMeasureFrequency()
448 base->CTRL &= ~SFA_CTRL_SFA_EN_MASK; in SFA_Deinit()
492 base->CTRL |= SFA_CTRL_CUT_PIN_EN_MASK; in SFA_SetMeasureConfig()
507 base->CTRL &= ~SFA_CTRL_CUT_PIN_EN_MASK; in SFA_SetMeasureConfig()
512 base->CTRL &= ~SFA_CTRL_SFA_EN_MASK; in SFA_SetMeasureConfig()
518 base->CTRL = in SFA_SetMeasureConfig()
535 base->CTRL |= SFA_CTRL_SFA_TRIG_MEAS_EN_MASK; in SFA_SetMeasureConfig()
536 base->CTRL |= in SFA_SetMeasureConfig()
541 base->CTRL &= ~SFA_CTRL_SFA_TRIG_MEAS_EN_MASK; in SFA_SetMeasureConfig()
545 base->CTRL |= SFA_CTRL_SFA_EN_MASK; in SFA_SetMeasureConfig()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_rit/ |
| D | fsl_rit.h | 106 return (base->CTRL); in RIT_GetStatusFlags()
118 base->CTRL |= mask; in RIT_ClearStatusFlags()
208 base->CTRL |= RIT_CTRL_RITEN_MASK; in RIT_StartTimer()
222 base->CTRL &= ~RIT_CTRL_RITEN_MASK; in RIT_StopTimer()
238 base->CTRL |= RIT_CTRL_RITENCLR_MASK; in RIT_ClearCounter()
242 base->CTRL &= ~RIT_CTRL_RITENCLR_MASK; in RIT_ClearCounter()
261 base->CTRL |= RIT_CTRL_RITENCLR_MASK; in RIT_SetCountAutoClear()
265 base->CTRL &= ~RIT_CTRL_RITENCLR_MASK; in RIT_SetCountAutoClear()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpflexcomm/lpuart/ |
| D | fsl_lpuart.c | 213 uint32_t ctrl = base->CTRL; in LPUART_ReadNonBlocking()
350 base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); in LPUART_Init()
373 …temp = base->CTRL & ~(LPUART_CTRL_PE_MASK | LPUART_CTRL_PT_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL… in LPUART_Init()
400 base->CTRL = temp; in LPUART_Init()
467 temp = base->CTRL; in LPUART_Init()
478 base->CTRL = temp; in LPUART_Init()
545 base->CTRL = 0U; in LPUART_Deinit()
671 oldCtrl = base->CTRL; in LPUART_SetBaudRate()
674 base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); in LPUART_SetBaudRate()
694 base->CTRL = oldCtrl; in LPUART_SetBaudRate()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/ |
| D | fsl_power.c | 227 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
229 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
230 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
236 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
267 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
298 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
307 PMC->CTRL &= ~interruptMask; in POWER_DisableInterrupts()
318 PMC->CTRL |= PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
322 PMC->CTRL &= ~PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
363 pmc_ctrl = PMC->CTRL; in POWER_EnterRbb()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/ |
| D | fsl_power.c | 227 if ((PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK)) != 0U) in POWER_DisableLVD()
229 lvdChangeFlag = PMC->CTRL & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
230 PMC->CTRL &= ~(PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_DisableLVD()
236 PMC->CTRL |= lvdChangeFlag & (PMC_CTRL_LVDCORERE_MASK | PMC_CTRL_LVDCOREIE_MASK); in POWER_RestoreLVD()
267 PMC->CTRL |= PMC_CTRL_APPLYCFG_MASK; in POWER_ApplyPD()
298 PMC->CTRL |= interruptMask; in POWER_EnableInterrupts()
307 PMC->CTRL &= ~interruptMask; in POWER_DisableInterrupts()
318 PMC->CTRL |= PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
322 PMC->CTRL &= ~PMC_CTRL_BUFEN_MASK; in POWER_SetAnalogBuffer()
363 pmc_ctrl = PMC->CTRL; in POWER_EnterRbb()
[all …]
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| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/phy/ |
| D | usb_phy.c | 101 usbPhyBase->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK; /* support LS device. */ in USB_EhciPhyInit()
102 …usbPhyBase->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; /* support external FS Hub with LS device c… in USB_EhciPhyInit()
155 usbPhyBase->CTRL |= USBPHY_CTRL_ENAUTO_PWRON_PLL_MASK; in USB_EhciLowPowerPhyInit()
157 usbPhyBase->CTRL |= USBPHY_CTRL_ENAUTOCLR_CLKGATE_MASK | USBPHY_CTRL_ENAUTOCLR_PHY_PWD_MASK; in USB_EhciLowPowerPhyInit()
158 usbPhyBase->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK; /* support LS device. */ in USB_EhciLowPowerPhyInit()
159 …usbPhyBase->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL3_MASK; /* support external FS Hub with LS device c… in USB_EhciLowPowerPhyInit()
210 usbPhyBase->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* set to 1U to gate clocks */ in USB_EhciPhyDeinit()
237 usbPhyBase->CTRL |= USBPHY_CTRL_ENHOSTDISCONDETECT_MASK; in USB_EhcihostPhyDisconnectDetectCmd()
241 usbPhyBase->CTRL &= (~USBPHY_CTRL_ENHOSTDISCONDETECT_MASK); in USB_EhcihostPhyDisconnectDetectCmd()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/qtmr_1/ |
| D | fsl_qtmr.c | 80 …base->CHANNEL[channel].CTRL = (TMR_CTRL_PCS(config->primarySource) | TMR_CTRL_SCS(config->secondar… in QTMR_Init()
104 base->CHANNEL[channel].CTRL &= (uint16_t)(~TMR_CTRL_CM_MASK); in QTMR_Deinit()
230 reg = base->CHANNEL[channel].CTRL; in QTMR_SetupPwm()
248 base->CHANNEL[channel].CTRL = reg; in QTMR_SetupPwm()
286 reg = base->CHANNEL[channel].CTRL & (uint16_t)(~TMR_CTRL_SCS_MASK); in QTMR_SetupInputCapture()
290 base->CHANNEL[channel].CTRL = reg; in QTMR_SetupInputCapture()
557 base->CHANNEL[channel].CTRL |= TMR_CTRL_LENGTH_MASK; in QTMR_SetTimerPeriod()
562 if ((base->CHANNEL[channel].CTRL & TMR_CTRL_DIR_MASK) != 0U) in QTMR_SetTimerPeriod()
585 base->CHANNEL[channel].CTRL |= TMR_CTRL_LENGTH_MASK; in QTMR_SetCompareValue()
587 if ((base->CHANNEL[channel].CTRL & TMR_CTRL_DIR_MASK) != 0U) in QTMR_SetCompareValue()
[all …]
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpuart/ |
| D | fsl_lpuart.c | 298 uint32_t ctrl = base->CTRL; in LPUART_ReadNonBlocking()
443 base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); in LPUART_Init()
470 …temp = base->CTRL & ~(LPUART_CTRL_PE_MASK | LPUART_CTRL_PT_MASK | LPUART_CTRL_M_MASK | LPUART_CTRL… in LPUART_Init()
497 base->CTRL = temp; in LPUART_Init()
564 temp = base->CTRL; in LPUART_Init()
575 base->CTRL = temp; in LPUART_Init()
617 base->CTRL = 0U; in LPUART_Deinit()
750 oldCtrl = base->CTRL; in LPUART_SetBaudRate()
753 base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); in LPUART_SetBaudRate()
777 base->CTRL = oldCtrl; in LPUART_SetBaudRate()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/sctimer/ |
| D | fsl_sctimer.c | 135 base->CTRL = in SCTIMER_Init()
138 base->CTRL |= SCT_CTRL_CLRCTR_L_MASK; in SCTIMER_Init()
142 base->CTRL |= in SCTIMER_Init()
144 base->CTRL |= SCT_CTRL_CLRCTR_H_MASK; in SCTIMER_Init()
176 base->CTRL |= (SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK); in SCTIMER_Deinit()
285 …uint32_t sctClock = srcClock_Hz / (((base->CTRL & SCT_CTRL_PRE_L_MASK) >> SCT_CTRL_PRE_L_SHIFT)… in SCTIMER_SetupPwm()
294 base->CTRL |= SCT_CTRL_BIDIR_L_MASK; in SCTIMER_SetupPwm()
416 periodMatchReg = base->EV[event].CTRL & SCT_EV_CTRL_MATCHSEL_MASK; in SCTIMER_UpdatePwmDutycycle()
419 pulseMatchReg = base->EV[event + 1U].CTRL & SCT_EV_CTRL_MATCHSEL_MASK; in SCTIMER_UpdatePwmDutycycle()
493 base->EV[s_currentEvent].CTRL = currentCtrlVal | SCT_EV_CTRL_IOSEL(whichIO); in SCTIMER_CreateAndScheduleEvent()
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| D | fsl_sctimer.h | 516 base->CTRL &= ~(SCT_CTRL_HALT_H_MASK); in SCTIMER_StartTimer()
522 base->CTRL &= ~(SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK); in SCTIMER_StartTimer()
528 base->CTRL &= ~(SCT_CTRL_HALT_L_MASK); in SCTIMER_StartTimer()
558 base->CTRL |= (SCT_CTRL_HALT_H_MASK); in SCTIMER_StopTimer()
564 base->CTRL |= (SCT_CTRL_HALT_L_MASK | SCT_CTRL_HALT_H_MASK); in SCTIMER_StopTimer()
570 base->CTRL |= (SCT_CTRL_HALT_L_MASK); in SCTIMER_StopTimer()
794 uint32_t reg = base->EV[event].CTRL; in SCTIMER_SetupStateLdMethodAction()
807 base->EV[event].CTRL = reg; in SCTIMER_SetupStateLdMethodAction()
828 uint32_t reg = base->EV[event].CTRL; in SCTIMER_SetupNextStateActionwithLdMethod()
840 base->EV[event].CTRL = reg; in SCTIMER_SetupNextStateActionwithLdMethod()
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/lpc_dac/ |
| D | fsl_dac.h | 128 base->CTRL |= DAC_CTRL_DMA_ENA_MASK; in DAC_EnableDMA()
132 base->CTRL &= ~DAC_CTRL_DMA_ENA_MASK; in DAC_EnableDMA()
147 base->CTRL |= DAC_CTRL_CNT_ENA_MASK; in DAC_EnableCounter()
151 base->CTRL &= ~DAC_CTRL_CNT_ENA_MASK; in DAC_EnableCounter()
165 if (0U != (DAC_CTRL_INT_DMA_REQ_MASK & base->CTRL)) in DAC_GetDMAInterruptRequestFlag()
167 if (0U != (DAC_CTRL_INT_CPU_REQ_MASK & base->CTRL)) in DAC_GetDMAInterruptRequestFlag()
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