Searched refs:CTLR (Results 1 – 2 of 2) sorted by relevance
108 …__IOM uint32_t CTLR; /*!< \brief Offset: 0x000 (R/W) Distributor Control Register… member151 …__IOM uint32_t CTLR; /*!< \brief Offset: 0x000 (R/W) Redistributor Control Regist… member182 …__IOM uint32_t CTLR; /*!< \brief Offset: 0x000 (R/W) CPU Interface Control Regist… member282 base = &GIC_GetRdist()->CTLR; in GIC_WaitRWP()287 base = &GICDistributor->CTLR; in GIC_WaitRWP()301 return !!(GICDistributor->CTLR & 0x30); in GIC_GetARE()308 GICDistributor->CTLR &=~1U; in GIC_DisableDistributor()703 GICDistributor->CTLR = ((1U << GICD_CTLR_ARE_NS) | (1U << GICD_CTLR_ENGRP1A)); in GIC_DistInit()738 GICInterface->CTLR |= 1U; //enable interface in GIC_EnableInterface()745 GICInterface->CTLR &=~1U; //disable distributor in GIC_DisableInterface()
295 volatile uint32 CTLR; /* +0x0000 - RW - Distributor Control Register */ member372 volatile uint32 CTLR; /* +0x0000 - RW - Redistributor Control Register */ member429 volatile uint32 CTLR; /* +0x0000 - RW - ITS Control Register */ member
