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Searched refs:CT32BIT3_CAP_PMUX_ID (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_inputmux_connections.h36 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
237 kINPUTMUX_Gpio0Inp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
238 kINPUTMUX_Gpio1Inp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
239 kINPUTMUX_Gpio12Inp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
240 kINPUTMUX_Gpio13Inp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
241 kINPUTMUX_Gpio14Inp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
242 kINPUTMUX_Gpio21Inp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
243 kINPUTMUX_Gpio24Inp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
244 kINPUTMUX_Gpio25Inp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
245 kINPUTMUX_Gpio37Inp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_inputmux_connections.h36 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
237 kINPUTMUX_Gpio0Inp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
238 kINPUTMUX_Gpio1Inp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
239 kINPUTMUX_Gpio12Inp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
240 kINPUTMUX_Gpio13Inp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
241 kINPUTMUX_Gpio14Inp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
242 kINPUTMUX_Gpio21Inp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
243 kINPUTMUX_Gpio24Inp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
244 kINPUTMUX_Gpio25Inp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
245 kINPUTMUX_Gpio37Inp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_inputmux_connections.h37 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
252 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
253 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
254 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
255 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
256 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
257 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
258 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
259 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
260 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_inputmux_connections.h37 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
252 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
253 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
254 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
255 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
256 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
257 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
258 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
259 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
260 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_inputmux_connections.h38 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
343 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
344 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
345 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
346 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
347 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
348 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
349 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
350 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
351 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_inputmux_connections.h38 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
343 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
344 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
345 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
346 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
347 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
348 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
349 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
350 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
351 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_inputmux_connections.h38 #define CT32BIT3_CAP_PMUX_ID 0x630U macro
343 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
344 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
345 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
346 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
347 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
348 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
349 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
350 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
351 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_inputmux_connections.h48 #define CT32BIT3_CAP_PMUX_ID 0x660U macro
605 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
606 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
607 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
608 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
609 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
610 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
611 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
612 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
613 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_inputmux_connections.h48 #define CT32BIT3_CAP_PMUX_ID 0x660U macro
605 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
606 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
607 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
608 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
609 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
610 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
611 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
612 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
613 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_inputmux_connections.h48 #define CT32BIT3_CAP_PMUX_ID 0x660U macro
605 kINPUTMUX_CtInp0ToTimer3CaptureChannels = 0U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
606 kINPUTMUX_CtInp1ToTimer3CaptureChannels = 1U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
607 kINPUTMUX_CtInp2ToTimer3CaptureChannels = 2U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
608 kINPUTMUX_CtInp3ToTimer3CaptureChannels = 3U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
609 kINPUTMUX_CtInp4ToTimer3CaptureChannels = 4U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
610 kINPUTMUX_CtInp5ToTimer3CaptureChannels = 5U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
611 kINPUTMUX_CtInp6ToTimer3CaptureChannels = 6U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
612 kINPUTMUX_CtInp7ToTimer3CaptureChannels = 7U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
613 kINPUTMUX_CtInp8ToTimer3CaptureChannels = 8U + (CT32BIT3_CAP_PMUX_ID << PMUX_SHIFT),
[all …]