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Searched refs:CT32BIT2_CAP_PMUX_ID (Results 1 – 10 of 10) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_inputmux_connections.h35 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
211 …kINPUTMUX_Gpio0Inp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
212 …kINPUTMUX_Gpio1Inp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
213 …kINPUTMUX_Gpio12Inp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
214 …kINPUTMUX_Gpio13Inp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
215 …kINPUTMUX_Gpio14Inp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
216 …kINPUTMUX_Gpio21Inp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
217 …kINPUTMUX_Gpio24Inp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
218 …kINPUTMUX_Gpio25Inp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
219 …kINPUTMUX_Gpio37Inp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_inputmux_connections.h35 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
211 …kINPUTMUX_Gpio0Inp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
212 …kINPUTMUX_Gpio1Inp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
213 …kINPUTMUX_Gpio12Inp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
214 …kINPUTMUX_Gpio13Inp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
215 …kINPUTMUX_Gpio14Inp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
216 …kINPUTMUX_Gpio21Inp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
217 …kINPUTMUX_Gpio24Inp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
218 …kINPUTMUX_Gpio25Inp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
219 …kINPUTMUX_Gpio37Inp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_inputmux_connections.h36 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
231 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
232 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
233 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
234 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
235 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
236 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
237 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
238 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
239 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_inputmux_connections.h36 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
231 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
232 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
233 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
234 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
235 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
236 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
237 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
238 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
239 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_inputmux_connections.h37 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
322 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
323 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
324 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
325 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
326 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
327 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
328 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
329 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
330 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_inputmux_connections.h37 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
322 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
323 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
324 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
325 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
326 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
327 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
328 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
329 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
330 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_inputmux_connections.h37 #define CT32BIT2_CAP_PMUX_ID 0x620U macro
322 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
323 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
324 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
325 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
326 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
327 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
328 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
329 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
330 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_inputmux_connections.h47 #define CT32BIT2_CAP_PMUX_ID 0x640U macro
574 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
575 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
576 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
577 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
578 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
579 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
580 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
581 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
582 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_inputmux_connections.h47 #define CT32BIT2_CAP_PMUX_ID 0x640U macro
574 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
575 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
576 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
577 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
578 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
579 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
580 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
581 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
582 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_inputmux_connections.h47 #define CT32BIT2_CAP_PMUX_ID 0x640U macro
574 kINPUTMUX_CtInp0ToTimer2CaptureChannels = 0U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
575 kINPUTMUX_CtInp1ToTimer2CaptureChannels = 1U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
576 kINPUTMUX_CtInp2ToTimer2CaptureChannels = 2U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
577 kINPUTMUX_CtInp3ToTimer2CaptureChannels = 3U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
578 kINPUTMUX_CtInp4ToTimer2CaptureChannels = 4U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
579 kINPUTMUX_CtInp5ToTimer2CaptureChannels = 5U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
580 kINPUTMUX_CtInp6ToTimer2CaptureChannels = 6U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
581 kINPUTMUX_CtInp7ToTimer2CaptureChannels = 7U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
582 kINPUTMUX_CtInp8ToTimer2CaptureChannels = 8U + (CT32BIT2_CAP_PMUX_ID << PMUX_SHIFT),
[all …]