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Searched refs:CPC_CACHE_SP_CTRL_0 (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_pgmc.c241 ptrMemSpCtrlReg = &(base->CPC_CACHE_SP_CTRL_0); in PGMC_CPC_CACHE_ControlBySetPointMode()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h60376 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
DMIMXRT1175_cm7.h59474 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h58950 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
DMIMXRT1165_cm4.h59852 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h59474 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h63760 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
DMIMXRT1166_cm7.h62858 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h64281 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
DMIMXRT1173_cm7.h63379 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h63382 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h74049 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member
DMIMXRT1176_cm4.h74951 …__IO uint32_t CPC_CACHE_SP_CTRL_0; /**< CPC cache Setpoint control 0, offset: 0x48 */ member