Home
last modified time | relevance | path

Searched refs:CMP_C0_HYSTCTR_MASK (Results 1 – 25 of 58) sorted by relevance

123

/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K116_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K118_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K146_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K142_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K142W_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K148_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
DS32K144_CMP.h103 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
106 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/acmp/
Dfsl_acmp.c89 CMP_C0_HYSTCTR_MASK | in ACMP_Init()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h768 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
776 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h769 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
777 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h767 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
775 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h925 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
933 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h933 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
941 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h927 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
935 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h926 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
934 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h886 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
894 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h935 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
943 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h887 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
895 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h934 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
942 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h1628 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
1636 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2630 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
2638 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2626 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
2634 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4637 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
4645 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h1916 #define CMP_C0_HYSTCTR_MASK (0x3U) macro
1924 … (((uint32_t)(((uint32_t)(x)) << CMP_C0_HYSTCTR_SHIFT)) & CMP_C0_HYSTCTR_MASK)

123