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Searched refs:CMP_C0_FPR_MASK (Results 1 – 25 of 74) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K116_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K118_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K146_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K142_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K142W_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K148_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
DS32K144_CMP.h153 #define CMP_C0_FPR_MASK (0xFF0000U) macro
156 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/acmp/
Dfsl_acmp.c331 uint32_t tmp32 = (base->C0 & (~(CMP_C0_FILTER_CNT_MASK | CMP_C0_FPR_MASK | in ACMP_SetFilterConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h846 #define CMP_C0_FPR_MASK (0xFF0000U) macro
850 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h847 #define CMP_C0_FPR_MASK (0xFF0000U) macro
851 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h845 #define CMP_C0_FPR_MASK (0xFF0000U) macro
849 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h1013 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1017 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h1021 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1024 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h1015 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1019 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h1014 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1018 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h964 #define CMP_C0_FPR_MASK (0xFF0000U) macro
968 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h1023 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1026 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h965 #define CMP_C0_FPR_MASK (0xFF0000U) macro
969 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h1022 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1025 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h1716 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1720 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2718 #define CMP_C0_FPR_MASK (0xFF0000U) macro
2722 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2714 #define CMP_C0_FPR_MASK (0xFF0000U) macro
2718 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4717 #define CMP_C0_FPR_MASK (0xFF0000U) macro
4720 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h1996 #define CMP_C0_FPR_MASK (0xFF0000U) macro
1999 …x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_FPR_SHIFT)) & CMP_C0_FPR_MASK)

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