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Searched refs:CMP_C0_CFR_SHIFT (Results 1 – 25 of 73) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K144W_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K116_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K118_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K146_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K142_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K142W_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K148_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
DS32K144_CMP.h169 #define CMP_C0_CFR_SHIFT (26U) macro
171 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/
DMKE14Z4.h864 #define CMP_C0_CFR_SHIFT (26U) macro
869 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/
DMKE15Z4.h865 #define CMP_C0_CFR_SHIFT (26U) macro
870 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/
DMKE16Z4.h863 #define CMP_C0_CFR_SHIFT (26U) macro
868 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/
DMKE12Z7.h1034 #define CMP_C0_CFR_SHIFT (26U) macro
1039 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/
DMKE12Z9.h1040 #define CMP_C0_CFR_SHIFT (26U) macro
1045 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/
DMKE17Z7.h1036 #define CMP_C0_CFR_SHIFT (26U) macro
1041 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/
DMKE13Z7.h1035 #define CMP_C0_CFR_SHIFT (26U) macro
1040 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/
DMKE14Z7.h982 #define CMP_C0_CFR_SHIFT (26U) macro
987 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/
DMKE17Z9.h1042 #define CMP_C0_CFR_SHIFT (26U) macro
1047 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/
DMKE15Z7.h983 #define CMP_C0_CFR_SHIFT (26U) macro
988 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/
DMKE13Z9.h1041 #define CMP_C0_CFR_SHIFT (26U) macro
1046 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/
DMKE14F16.h1737 #define CMP_C0_CFR_SHIFT (26U) macro
1742 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2739 #define CMP_C0_CFR_SHIFT (26U) macro
2744 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2735 #define CMP_C0_CFR_SHIFT (26U) macro
2740 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4736 #define CMP_C0_CFR_SHIFT (26U) macro
4741 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h2015 #define CMP_C0_CFR_SHIFT (26U) macro
2020 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h2016 #define CMP_C0_CFR_SHIFT (26U) macro
2021 #define CMP_C0_CFR(x) (((uint32_t)(((uint32_t)(x)) << CMP_C0_CFR_SHIFT))…

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