Home
last modified time | relevance | path

Searched refs:CM4__TPM_BASE (Results 1 – 15 of 15) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX2/
DMIMX8QX2_cm4.h95284 #define CM4__TPM_BASE (0x41200000u) macro
95286 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
95292 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX1/
DMIMX8QX1_cm4.h95284 #define CM4__TPM_BASE (0x41200000u) macro
95286 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
95292 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX1/
DMIMX8DX1_cm4.h95284 #define CM4__TPM_BASE (0x41200000u) macro
95286 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
95292 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX2/
DMIMX8DX2_cm4.h95284 #define CM4__TPM_BASE (0x41200000u) macro
95286 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
95292 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX3/
DMIMX8QX3_cm4.h125459 #define CM4__TPM_BASE (0x41200000u) macro
125461 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125467 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX4/
DMIMX8DX4_cm4.h125459 #define CM4__TPM_BASE (0x41200000u) macro
125461 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125467 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX3/
DMIMX8DX3_cm4.h125459 #define CM4__TPM_BASE (0x41200000u) macro
125461 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125467 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX6/
DMIMX8QX6_dsp.h129853 #define CM4__TPM_BASE (0x37200000u) macro
129855 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
129861 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
DMIMX8QX6_cm4.h125461 #define CM4__TPM_BASE (0x41200000u) macro
125463 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125469 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX6/
DMIMX8DX6_cm4.h125461 #define CM4__TPM_BASE (0x41200000u) macro
125463 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125469 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX5/
DMIMX8QX5_cm4.h125460 #define CM4__TPM_BASE (0x41200000u) macro
125462 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125468 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8DX5/
DMIMX8DX5_cm4.h125461 #define CM4__TPM_BASE (0x41200000u) macro
125463 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125469 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX6/
DMIMX8UX6_cm4.h125462 #define CM4__TPM_BASE (0x41200000u) macro
125464 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125470 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UX5/
DMIMX8UX5_cm4.h125462 #define CM4__TPM_BASE (0x41200000u) macro
125464 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125470 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QX4/
DMIMX8QX4_cm4.h125458 #define CM4__TPM_BASE (0x41200000u) macro
125460 #define CM4__TPM ((TPM_Type *)CM4__TPM_BASE)
125466 #define TPM_BASE_ADDRS { CM4__TPM_BASE, SCU__TPM_BASE }