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Searched refs:CM4_1__LPCG_LPIT_BASE (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/drivers/
Dfsl_clock.h359 kCLOCK_M4_1_Lpit = LPCG_TUPLE(SC_R_M4_1_PIT, CM4_1__LPCG_LPIT_BASE),
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h12901 #define CM4_1__LPCG_LPIT_BASE (0x3B610000u) macro
12903 #define CM4_1__LPCG_LPIT ((CM4_LPCG_LPIT_Type *)CM4_1__LPCG_LPIT_BASE)
12905 #define CM4_LPCG_LPIT_BASE_ADDRS { CM4_0__LPCG_LPIT_BASE, CM4_1__LPCG_LPIT_BASE }
DMIMX8QM6_dsp.h13080 #define CM4_1__LPCG_LPIT_BASE (0x3B610000u) macro
13082 #define CM4_1__LPCG_LPIT ((CM4_LPCG_LPIT_Type *)CM4_1__LPCG_LPIT_BASE)
13084 #define CM4_LPCG_LPIT_BASE_ADDRS { CM4_0__LPCG_LPIT_BASE, CM4_1__LPCG_LPIT_BASE }
DMIMX8QM6_cm4_core1.h9991 #define CM4_1__LPCG_LPIT_BASE (0x41610000u) macro
9993 #define CM4_1__LPCG_LPIT ((CM4_LPCG_LPIT_Type *)CM4_1__LPCG_LPIT_BASE)
9995 #define CM4_LPCG_LPIT_BASE_ADDRS { CM4_0__LPCG_LPIT_BASE, CM4_1__LPCG_LPIT_BASE }
DMIMX8QM6_cm4_core0.h9991 #define CM4_1__LPCG_LPIT_BASE (0x3B610000u) macro
9993 #define CM4_1__LPCG_LPIT ((CM4_LPCG_LPIT_Type *)CM4_1__LPCG_LPIT_BASE)
9995 #define CM4_LPCG_LPIT_BASE_ADDRS { CM4_0__LPCG_LPIT_BASE, CM4_1__LPCG_LPIT_BASE }