Searched refs:CLOCK_REG (Results 1 – 7 of 7) sorted by relevance
267 #define CLOCK_REG(name) ((*(volatile uint32_t *)((uint32_t)(name) & ~0x10000000UL))) macro269 #define CLOCK_REG(name) (*(volatile uint32_t *)((uint32_t)(name))) macro583 uint32_t reg = CLOCK_REG(name); in CLOCK_EnableClock()590 CLOCK_REG(name) &= (~MRCC_CC_MASK); in CLOCK_EnableClock()591 CLOCK_REG(name) |= (MRCC_CC_MASK & (uint32_t)kCLOCK_IpClkControl_fun1); in CLOCK_EnableClock()593 if ((CLOCK_REG(name) & MRCC_PR_MASK) == MRCC_PR_MASK) in CLOCK_EnableClock()595 CLOCK_REG(name) |= MRCC_RSTB_MASK; in CLOCK_EnableClock()619 CLOCK_REG(name) &= (~MRCC_CC_MASK); in CLOCK_EnableClockLPMode()620 CLOCK_REG(name) |= (MRCC_CC_MASK & (uint32_t)control); in CLOCK_EnableClockLPMode()622 if ((CLOCK_REG(name) & MRCC_PR_MASK) == MRCC_PR_MASK) in CLOCK_EnableClockLPMode()[all …]
41 #define SCG_FIRCCFG_RANGE_VAL ((CLOCK_REG(&SCG0->FIRCCFG) & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_…46 …((CLOCK_REG(&FRO192M0->FROCCSR) & FRO192M_FROCCSR_POSTDIV_SEL_MASK) >> FRO192M_FROCCSR_POSTDIV_SEL…169 uint32_t reg = CLOCK_REG(name); in CLOCK_GetIpFreq()335 CLOCK_REG(&SCG0->SOSCCSR) = (uint32_t)config->enableMode | SCG_SOSCCSR_SOSCEN_MASK; in CLOCK_InitSysOsc()340 while ((CLOCK_REG(&SCG0->SOSCCSR) & SCG_SOSCCSR_SOSCVLD_MASK) != SCG_SOSCCSR_SOSCVLD_MASK) in CLOCK_InitSysOsc()360 uint32_t reg = CLOCK_REG(&SCG0->SOSCCSR); in CLOCK_DeinitSysOsc()374 CLOCK_REG(&SCG0->SOSCCSR) = SCG_SOSCCSR_SOSCERR_MASK; in CLOCK_DeinitSysOsc()386 if ((CLOCK_REG(&SCG0->SOSCCSR) & SCG_SOSCCSR_SOSCVLD_MASK) == in CLOCK_GetSysOscFreq()427 CLOCK_REG(&SCG0->SIRCCSR) = (uint32_t)config->enableMode; in CLOCK_InitSirc()437 while ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) != SCG_SIRCCSR_SIRCVLD_MASK) in CLOCK_InitSirc()[all …]
288 #define CLOCK_REG(name) ((*(volatile uint32_t *)((uint32_t)(name) & ~0x10000000UL))) macro290 #define CLOCK_REG(name) (*(volatile uint32_t *)((uint32_t)(name))) macro613 uint32_t reg = CLOCK_REG(name); in CLOCK_EnableClock()620 CLOCK_REG(name) &= (~MRCC_CC_MASK); in CLOCK_EnableClock()621 CLOCK_REG(name) |= (MRCC_CC_MASK & (uint32_t)kCLOCK_IpClkControl_fun1); in CLOCK_EnableClock()623 if ((CLOCK_REG(name) & MRCC_PR_MASK) == MRCC_PR_MASK) in CLOCK_EnableClock()625 CLOCK_REG(name) |= MRCC_RSTB_MASK; in CLOCK_EnableClock()657 CLOCK_REG(name) &= (~MRCC_CC_MASK); in CLOCK_EnableClockLPMode()658 CLOCK_REG(name) |= (MRCC_CC_MASK & (uint32_t)control); in CLOCK_EnableClockLPMode()660 if ((CLOCK_REG(name) & MRCC_PR_MASK) == MRCC_PR_MASK) in CLOCK_EnableClockLPMode()[all …]
41 #define SCG_FIRCCFG_RANGE_VAL ((CLOCK_REG(&SCG0->FIRCCFG) & SCG_FIRCCFG_RANGE_MASK) >> SCG_FIRCCFG_…46 …((CLOCK_REG(&FRO192M0->FROCCSR) & FRO192M_FROCCSR_POSTDIV_SEL_MASK) >> FRO192M_FROCCSR_POSTDIV_SEL…169 uint32_t reg = CLOCK_REG(name); in CLOCK_GetIpFreq()336 CLOCK_REG(&SCG0->SOSCCSR) = (uint32_t)config->enableMode | SCG_SOSCCSR_SOSCEN_MASK; in CLOCK_InitSysOsc()341 while ((CLOCK_REG(&SCG0->SOSCCSR) & SCG_SOSCCSR_SOSCVLD_MASK) != SCG_SOSCCSR_SOSCVLD_MASK) in CLOCK_InitSysOsc()361 uint32_t reg = CLOCK_REG(&SCG0->SOSCCSR); in CLOCK_DeinitSysOsc()375 CLOCK_REG(&SCG0->SOSCCSR) = SCG_SOSCCSR_SOSCERR_MASK; in CLOCK_DeinitSysOsc()387 if ((CLOCK_REG(&SCG0->SOSCCSR) & SCG_SOSCCSR_SOSCVLD_MASK) == in CLOCK_GetSysOscFreq()428 CLOCK_REG(&SCG0->SIRCCSR) = (uint32_t)config->enableMode; in CLOCK_InitSirc()438 while ((CLOCK_REG(&SCG0->SIRCCSR) & SCG_SIRCCSR_SIRCVLD_MASK) != SCG_SIRCCSR_SIRCVLD_MASK) in CLOCK_InitSirc()[all …]
391 uint32_t mrcc_secsubsys = CLOCK_REG(kCLOCK_Secsubsys); in ELEMU_LP_WakeupPathInit()
