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Searched refs:CLOCK_IP_CMU_ISR_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Monitor.c421 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
444 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
450 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-latest/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Monitor.c454 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_GetInterruptStatus()
477 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
483 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-latest/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Monitor.c449 CmuIsrValue = Clock_Ip_apxCmu[IndexCmu]->SR & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
455 CmuIerValue = Clock_Ip_apxCmu[IndexCmu]->IER & CLOCK_IP_CMU_ISR_MASK; in Clock_Ip_CMU_ClockFailInt()
/hal_nxp-latest/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Specific.h195 #define CLOCK_IP_CMU_ISR_MASK 3U macro
/hal_nxp-latest/s32/drivers/s32k1/Mcu/include/
DClock_Ip_Specific.h368 #define CLOCK_IP_CMU_ISR_MASK 3U macro
/hal_nxp-latest/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Specific.h350 #define CLOCK_IP_CMU_ISR_MASK 3U macro