Home
last modified time | relevance | path

Searched refs:CLK_CTL2_PSCCTL0 (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h453 #define CLK_CTL2_PSCCTL0 8 /* CLKCTL_VDD1_COM PSCCTL0 */ macro
659 …kCLOCK_Syscon2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 3), /*!< Clock gate name: SYSCON_COMM */
660 …kCLOCK_Iopctl2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 4), /*!< Clock gate name: IOMUXC_VDDN */
Dfsl_clock.c177 case CLK_CTL2_PSCCTL0: in CLOCK_EnableClock()
264 case CLK_CTL2_PSCCTL0: in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h453 #define CLK_CTL2_PSCCTL0 8 /* CLKCTL_VDD1_COM PSCCTL0 */ macro
659 …kCLOCK_Syscon2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 3), /*!< Clock gate name: SYSCON_COMM */
660 …kCLOCK_Iopctl2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 4), /*!< Clock gate name: IOMUXC_VDDN */
Dfsl_clock.c177 case CLK_CTL2_PSCCTL0: in CLOCK_EnableClock()
264 case CLK_CTL2_PSCCTL0: in CLOCK_DisableClock()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h453 #define CLK_CTL2_PSCCTL0 8 /* CLKCTL_VDD1_COM PSCCTL0 */ macro
659 …kCLOCK_Syscon2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 3), /*!< Clock gate name: SYSCON_COMM */
660 …kCLOCK_Iopctl2 = CLK_GATE_DEFINE(CLK_CTL2_PSCCTL0, 4), /*!< Clock gate name: IOMUXC_VDDN */
Dfsl_clock.c177 case CLK_CTL2_PSCCTL0: in CLOCK_EnableClock()
264 case CLK_CTL2_PSCCTL0: in CLOCK_DisableClock()