Home
last modified time | relevance | path

Searched refs:CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h5280 #define CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK (0x400U) macro
5286 …2_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_SHIFT)) & CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK)
DMIMXRT595S_cm33.h11537 #define CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK (0x400U) macro
11543 …2_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_SHIFT)) & CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h11533 #define CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK (0x400U) macro
11539 …2_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_SHIFT)) & CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h11536 #define CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK (0x400U) macro
11542 …2_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_SHIFT)) & CLKCTL1_PSCCTL2_CLR_WWDT1_CLK_MASK)