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Searched refs:CLKCTL1_PSCCTL1_SET_I3C2_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h11042 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11048 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT735S_cm33_core1.h11078 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11084 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT735S_ezhv.h20612 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
20618 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h11078 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11084 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT758S_hifi1.h11042 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11048 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT758S_ezhv.h20612 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
20618 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h11042 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11048 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT798S_cm33_core1.h11078 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
11084 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)
DMIMXRT798S_ezhv.h20612 #define CLKCTL1_PSCCTL1_SET_I3C2_MASK (0x800U) macro
20618 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_SET_I3C2_SHIFT)) & CLKCTL1_PSCCTL1_SET_I3C2_MASK)