Searched refs:CLKCTL1_PSCCTL1_EDMA3_MASK (Results 1 – 12 of 12) sorted by relevance
1245 … CLKCTL1_PSCCTL1_EDMA3_MASK; /* DMA clock need to be enabled to finishe low power handshake. */ in AT_QUICKACCESS_SECTION_CODE()
10754 #define CLKCTL1_PSCCTL1_EDMA3_MASK (0x20U) macro10760 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_EDMA3_SHIFT)) & CLKCTL1_PSCCTL1_EDMA3_MASK)
10790 #define CLKCTL1_PSCCTL1_EDMA3_MASK (0x20U) macro10796 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_EDMA3_SHIFT)) & CLKCTL1_PSCCTL1_EDMA3_MASK)
20324 #define CLKCTL1_PSCCTL1_EDMA3_MASK (0x20U) macro20330 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_EDMA3_SHIFT)) & CLKCTL1_PSCCTL1_EDMA3_MASK)
