Home
last modified time | relevance | path

Searched refs:CLKCTL1_PSCCTL1_CLR_MU3_MASK (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h11386 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11392 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT735S_cm33_core1.h11422 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11428 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT735S_ezhv.h20956 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
20962 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h11422 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11428 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT758S_hifi1.h11386 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11392 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT758S_ezhv.h20956 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
20962 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h11386 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11392 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT798S_cm33_core1.h11422 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
11428 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)
DMIMXRT798S_ezhv.h20956 #define CLKCTL1_PSCCTL1_CLR_MU3_MASK (0x1000000U) macro
20962 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL1_CLR_MU3_SHIFT)) & CLKCTL1_PSCCTL1_CLR_MU3_MASK)