Home
last modified time | relevance | path

Searched refs:CLKCTL1_PSCCTL0_DMIC0_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h4312 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
4318 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)
DMIMXRT595S_cm33.h10569 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
10575 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h10565 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
10571 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h10568 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
10574 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h21505 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
21511 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h21505 #define CLKCTL1_PSCCTL0_DMIC0_MASK (0x1000000U) macro
21511 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_PSCCTL0_DMIC0_SHIFT)) & CLKCTL1_PSCCTL0_DMIC0_MASK)