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Searched refs:CLKCTL1_FCFCLKDIV_DIV_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.c1710 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1714 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1718 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1722 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.c1710 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1714 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1718 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1722 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.c1710 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1714 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1718 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
1722 ((CLKCTL1->FLEXCOMM[id - 17U].FCFCLKDIV & CLKCTL1_FCFCLKDIV_DIV_MASK) + 1U); in CLOCK_GetLPFlexCommClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h11881 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11884 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT735S_cm33_core1.h11917 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11920 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT735S_ezhv.h21451 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
21454 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h11917 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11920 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT758S_hifi1.h11881 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11884 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT758S_ezhv.h21451 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
21454 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h11881 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11884 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT798S_cm33_core1.h11917 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
11920 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)
DMIMXRT798S_ezhv.h21451 #define CLKCTL1_FCFCLKDIV_DIV_MASK (0xFFU) macro
21454 … (((uint32_t)(((uint32_t)(x)) << CLKCTL1_FCFCLKDIV_DIV_SHIFT)) & CLKCTL1_FCFCLKDIV_DIV_MASK)