Home
last modified time | relevance | path

Searched refs:CLKCTL1_DMIC0FCLKDIV_HALT_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4228 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
4233 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
DMIMXRT685S_cm33.h9958 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
9963 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h9958 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
9963 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h5812 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
5818 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
DMIMXRT595S_cm33.h12069 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
12075 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h12065 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
12071 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h12068 #define CLKCTL1_DMIC0FCLKDIV_HALT_MASK (0x40000000U) macro
12074 …(((uint32_t)(((uint32_t)(x)) << CLKCTL1_DMIC0FCLKDIV_HALT_SHIFT)) & CLKCTL1_DMIC0FCLKDIV_HALT_MASK)