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Searched refs:CLKCTL1_ACMP0FCLKDIV_RESET_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h4536 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
4541 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
DMIMXRT685S_cm33.h10266 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
10271 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h10266 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
10271 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h6167 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
6173 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
DMIMXRT595S_cm33.h12424 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
12430 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h12420 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
12426 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h12423 #define CLKCTL1_ACMP0FCLKDIV_RESET_MASK (0x20000000U) macro
12429 …(uint32_t)(((uint32_t)(x)) << CLKCTL1_ACMP0FCLKDIV_RESET_SHIFT)) & CLKCTL1_ACMP0FCLKDIV_RESET_MASK)