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Searched refs:CLKCTL0_ADC0FCLKDIV_RESET_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h2550 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
2555 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
DMIMXRT685S_cm33.h8261 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
8266 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h8261 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
8266 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h3671 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
3677 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
DMIMXRT595S_cm33.h9909 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
9915 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h9905 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
9911 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h9908 #define CLKCTL0_ADC0FCLKDIV_RESET_MASK (0x20000000U) macro
9914 …(((uint32_t)(((uint32_t)(x)) << CLKCTL0_ADC0FCLKDIV_RESET_SHIFT)) & CLKCTL0_ADC0FCLKDIV_RESET_MASK)