Searched refs:CIU2_IMU_CPU2_WR_MSG_TO_CPU1 (Results 1 – 4 of 4) sorted by relevance
3942 __IO uint32_t CIU2_IMU_CPU2_WR_MSG_TO_CPU1; /**< CPU2 write message to CPU1, offset: 0x1E8 */ member57081 #define IMU_PEER_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU2_WR_MSG_TO_CPU1))
6111 __IO uint32_t CIU2_IMU_CPU2_WR_MSG_TO_CPU1; /**< CPU2 write message to CPU1, offset: 0x1E8 */ member59250 #define IMU_PEER_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU2_WR_MSG_TO_CPU1))
6373 __IO uint32_t CIU2_IMU_CPU2_WR_MSG_TO_CPU1; /**< CPU2 write message to CPU1, offset: 0x1E8 */ member66064 #define IMU_PEER_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU2_WR_MSG_TO_CPU1))
14873 __IO uint32_t CIU2_IMU_CPU2_WR_MSG_TO_CPU1; /**< CPU2 write message to CPU1, offset: 0x1E8 */ member71850 #define IMU_CUR_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU2_WR_MSG_TO_CPU1))
