Searched refs:CIU2_IMU_CPU1_WR_MSG_TO_CPU2 (Results 1 – 4 of 4) sorted by relevance
3937 __IO uint32_t CIU2_IMU_CPU1_WR_MSG_TO_CPU2; /**< CPU1 write message to CPU2, offset: 0x1D4 */ member57079 #define IMU_CUR_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU1_WR_MSG_TO_CPU2))
6106 __IO uint32_t CIU2_IMU_CPU1_WR_MSG_TO_CPU2; /**< CPU1 write message to CPU2, offset: 0x1D4 */ member59248 #define IMU_CUR_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU1_WR_MSG_TO_CPU2))
6368 __IO uint32_t CIU2_IMU_CPU1_WR_MSG_TO_CPU2; /**< CPU1 write message to CPU2, offset: 0x1D4 */ member66062 #define IMU_CUR_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU1_WR_MSG_TO_CPU2))
14868 __IO uint32_t CIU2_IMU_CPU1_WR_MSG_TO_CPU2; /**< CPU1 write message to CPU2, offset: 0x1D4 */ member71852 #define IMU_PEER_CPU_BASE(link) (&(CIU2->CIU2_IMU_CPU1_WR_MSG_TO_CPU2))
