Home
last modified time | relevance | path

Searched refs:CH_CFG0 (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/src/
DCanEXCEL_Ip_Irq.c88 …if (CANXL_MRU_CH_CFG0_CHE_MASK == (IP_CANXL_0__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_… in ISR()
104 …if (CANXL_MRU_CH_CFG0_CHE_MASK == (IP_CANXL_1__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_… in ISR()
121 …if ((IP_CANXL_2__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_MASK) == CANXL_MRU_CH_CFG0_CHE… in ISR()
138 …if ((IP_CANXL_3__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_MASK) == CANXL_MRU_CH_CFG0_CHE… in ISR()
DCanEXCEL_Ip.c194 …base->CHXCONFIG[0u].CH_CFG0 |= CANXL_MRU_CH_CFG0_MBE0_MASK | CANXL_MRU_CH_CFG0_MBE3_MASK | CANXL_M… in Canexcel_GetControllerMRU()
1382 if (CANXL_MRU_CH_CFG0_IE_MASK == (base->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_IE_MASK)) in Canexcel_Ip_MruIRQHandler()
2494 CANEXCEL.EXL_MRU[u8Instance]->CHXCONFIG[0u].CH_CFG0 = 0U; in Canexcel_Ip_Deinit()
/hal_nxp-latest/s32/drivers/s32ze/Can_CANEXCEL/include/
DCanEXCEL_Ip_HwAccess.h654 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK; in CanXL_MruEnable()
655 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHE_MASK; in CanXL_MruEnable()
664 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK; in CanXL_MruDisable()
665 base->CHXCONFIG[0u].CH_CFG0 &= ~CANXL_MRU_CH_CFG0_CHE_MASK; in CanXL_MruDisable()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_CANXL_MRU.h78 …__IO uint32_t CH_CFG0; /**< Channel (x) Configuration 0, array offset: 0… member
DS32Z2_SMU_MRU.h78 …__IO uint32_t CH_CFG0; /**< Channel (x) Configuration 0, array offset: 0… member
DS32Z2_RTU_MRU.h78 …__IO uint32_t CH_CFG0; /**< Channel (x) Configuration 0, array offset: 0… member
DS32Z2_CE_MRU.h78 …__IO uint32_t CH_CFG0; /**< Channel (x) Configuration 0, array offset: 0… member