Searched refs:CHXCONFIG (Results 1 – 8 of 8) sorted by relevance
389 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()413 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()440 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()464 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()491 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()515 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()542 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()566 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()593 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()617 Base->CHXCONFIG[ChannelIdx].CH_MBSTAT &= (uint32)0xFFFFFFFFu; in ISR()[all …]
88 …if (CANXL_MRU_CH_CFG0_CHE_MASK == (IP_CANXL_0__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_… in ISR()104 …if (CANXL_MRU_CH_CFG0_CHE_MASK == (IP_CANXL_1__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_… in ISR()121 …if ((IP_CANXL_2__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_MASK) == CANXL_MRU_CH_CFG0_CHE… in ISR()138 …if ((IP_CANXL_3__MRU->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_CHE_MASK) == CANXL_MRU_CH_CFG0_CHE… in ISR()
187 if ((base->CHXCONFIG[0u].CH_MBSTAT & CANXL_MRU_CH_MBSTAT_MBS0_MASK) != 0U) in Canexcel_GetControllerMRU()194 …base->CHXCONFIG[0u].CH_CFG0 |= CANXL_MRU_CH_CFG0_MBE0_MASK | CANXL_MRU_CH_CFG0_MBE3_MASK | CANXL_M… in Canexcel_GetControllerMRU()195 base->CHXCONFIG[0u].CH_CFG1 |= CANXL_MRU_CH_CFG1_MBIC3_MASK; in Canexcel_GetControllerMRU()196 base->CHXCONFIG[0u].CH_MBSTAT |= CANXL_MRU_CH_MBSTAT_MBS3_MASK; in Canexcel_GetControllerMRU()1382 if (CANXL_MRU_CH_CFG0_IE_MASK == (base->CHXCONFIG[0u].CH_CFG0 & CANXL_MRU_CH_CFG0_IE_MASK)) in Canexcel_Ip_MruIRQHandler()1386 uint32 tmp = base->CHXCONFIG[0u].CH_CFG1; in Canexcel_Ip_MruIRQHandler()1388 if ((base->CHXCONFIG[0u].CH_MBSTAT & mask) != 0U) in Canexcel_Ip_MruIRQHandler()1392 base->CHXCONFIG[0u].CH_MBSTAT |= mask; in Canexcel_Ip_MruIRQHandler()1400 base->CHXCONFIG[0u].CH_MBSTAT = CANEXCEL_IP_CH1_MBSTAT_CLEAR_DEFAULT_VALUE_U32; in Canexcel_Ip_MruIRQHandler()2494 CANEXCEL.EXL_MRU[u8Instance]->CHXCONFIG[0u].CH_CFG0 = 0U; in Canexcel_Ip_Deinit()
654 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK; in CanXL_MruEnable()655 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHE_MASK; in CanXL_MruEnable()664 base->CHXCONFIG[0u].CH_CFG0 = CANXL_MRU_CH_CFG0_CHR_MASK; in CanXL_MruDisable()665 base->CHXCONFIG[0u].CH_CFG0 &= ~CANXL_MRU_CH_CFG0_CHE_MASK; in CanXL_MruDisable()
81 } CHXCONFIG[CANXL_MRU_CHXCONFIG_COUNT]; member
82 } CHXCONFIG[SMU_MRU_CHXCONFIG_COUNT]; member
82 } CHXCONFIG[RTU_MRU_CHXCONFIG_COUNT]; member
82 } CHXCONFIG[CE_MRU_CHXCONFIG_COUNT]; member
