| /hal_nxp-latest/mcux/mcux-sdk/drivers/edma/ |
| D | fsl_edma.h | 730 base->CERQ = DMA_CERQ_CERQ(channel); in EDMA_DisableChannelRequest()
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| D | fsl_edma.c | 1334 handle->base->CERQ = DMA_CERQ_CERQ(handle->channel); in EDMA_StopTransfer()
1347 handle->base->CERQ = DMA_CERQ_CERQ(handle->channel); in EDMA_AbortTransfer()
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| /hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/ |
| D | S32K118_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K116_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K148_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K144W_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K144_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K142W_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K142_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| D | S32K146_DMA.h | 85 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| /hal_nxp-latest/mcux/mcux-sdk/drivers/edma4/ |
| D | fsl_edma.h | 1476 EDMA_BASE(base)->CERQ = DMA_CERQ_CERQ(channel); in EDMA_DisableChannelRequest()
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| D | fsl_edma.c | 2440 handle->base->CERQ = DMA_CERQ_CERQ(handle->channel); in EDMA_StopTransfer()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/drivers/edma4/ |
| D | fsl_edma.h | 1476 EDMA_BASE(base)->CERQ = DMA_CERQ_CERQ(channel); in EDMA_DisableChannelRequest()
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| D | fsl_edma.c | 2447 handle->base->CERQ = DMA_CERQ_CERQ(handle->channel); in EDMA_StopTransfer()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MK02F12810/ |
| D | MK02F12810.h | 1555 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV30F12810/ |
| D | MKV30F12810.h | 1559 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z7/ |
| D | MKV10Z7.h | 1463 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F12810/ |
| D | MKV31F12810.h | 1572 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV10Z1287/ |
| D | MKV10Z1287.h | 1454 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/ |
| D | MKE12Z7.h | 1661 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/ |
| D | MKE12Z9.h | 1628 __O uint8_t CERQ; /**< Clear Enable Request, offset: 0x1A */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/ |
| D | MKE17Z7.h | 1663 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/ |
| D | MKE13Z7.h | 1662 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/ |
| D | MKV11Z7.h | 2241 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKV31F25612/ |
| D | MKV31F25612.h | 1574 …__O uint8_t CERQ; /**< Clear Enable Request Register, offset: 0x1A … member
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