| /hal_nxp-latest/imx/drivers/ |
| D | ccm_imx7d.h | 51 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8) macro
392 CCM_REG_CLR(ccmRoot) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CCM_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/drivers/ |
| D | fsl_clock.h | 170 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1071 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| D | fsl_clock.c | 950 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/drivers/ |
| D | fsl_clock.h | 170 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1071 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| D | fsl_clock.c | 956 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/drivers/ |
| D | fsl_clock.h | 170 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1071 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/drivers/ |
| D | fsl_clock.h | 172 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1126 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/drivers/ |
| D | fsl_clock.h | 170 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1071 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/drivers/ |
| D | fsl_clock.h | 179 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1119 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/drivers/ |
| D | fsl_clock.h | 170 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1071 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/drivers/ |
| D | fsl_clock.h | 197 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1376 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| D | fsl_clock.c | 978 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/drivers/ |
| D | fsl_clock.h | 197 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1376 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/drivers/ |
| D | fsl_clock.h | 197 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1376 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/drivers/ |
| D | fsl_clock.h | 203 #define CCM_REG_CLR(root) CCM_REG_OFF(root, 8U) macro
1384 CCM_REG_CLR(rootClk) = CCM_TARGET_ROOT_CLR_ENABLE_MASK; in CLOCK_DisableRoot()
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