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Searched refs:CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h23350 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23358 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
DMIMXRT1175_cm7.h23353 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23361 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h23041 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23049 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
DMIMXRT1165_cm4.h23038 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23046 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h23353 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23361 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h23053 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23061 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
DMIMXRT1166_cm7.h23056 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23064 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h23362 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23370 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
DMIMXRT1173_cm7.h23365 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23373 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h23368 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23376 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h23370 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23378 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)
DMIMXRT1176_cm4.h23367 #define CCM_OSCPLL_STATUS1_CPU2_MODE_MASK (0x300U) macro
23375 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU2_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU2_MODE_MASK)