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Searched refs:CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h23324 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23332 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
DMIMXRT1175_cm7.h23327 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23335 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h23015 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23023 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
DMIMXRT1165_cm4.h23012 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23020 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h23327 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23335 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h23027 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23035 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
DMIMXRT1166_cm7.h23030 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23038 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h23336 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23344 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
DMIMXRT1173_cm7.h23339 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23347 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h23342 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23350 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h23344 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23352 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)
DMIMXRT1176_cm4.h23341 #define CCM_OSCPLL_STATUS1_CPU1_MODE_MASK (0x30U) macro
23349 …t32_t)(((uint32_t)(x)) << CCM_OSCPLL_STATUS1_CPU1_MODE_SHIFT)) & CCM_OSCPLL_STATUS1_CPU1_MODE_MASK)