Searched refs:CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (Results 1 – 12 of 12) sorted by relevance
6455 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro6457 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
7169 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro7171 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
8441 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro8443 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
8461 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro8463 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
9413 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro9415 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
10485 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro10487 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
9416 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro9418 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
10487 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro10489 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
10804 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro10806 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
10886 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro10888 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
10808 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK (0x10000000U) macro10810 …(uint32_t)(x)) << CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_SHIFT)) & CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK)
6542 #define CCM_ANALOG_MISC1_CLR_IRQ_TEMPLOW_MASK 0x10000000u macro
