Home
last modified time | relevance | path

Searched refs:CASPER_INTENSET_DONE_MASK (Results 1 – 25 of 27) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h5970 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5976 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h5970 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5976 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h5815 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5821 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h5814 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5820 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h6402 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
6408 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h6401 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
6407 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h5815 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5821 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DLPC55S66_cm33_core0.h5815 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5821 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h5814 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5820 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DLPC55S69_cm33_core0.h5814 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5820 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6727 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
6733 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_cm33.h6727 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
6733 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1730 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
1736 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DMIMXRT595S_cm33.h7947 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
7953 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7943 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
7949 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7946 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
7952 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h4867 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4873 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DMIMX8UD7_dsp0.h4950 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4956 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DMIMX8UD7_cm33.h5276 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5282 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h5276 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5282 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DMIMX8UD3_dsp0.h4950 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4956 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h5276 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
5282 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
DMIMX8UD5_dsp0.h4950 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4956 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h4950 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4956 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h4950 #define CASPER_INTENSET_DONE_MASK (0x1U) macro
4956 … (((uint32_t)(((uint32_t)(x)) << CASPER_INTENSET_DONE_SHIFT)) & CASPER_INTENSET_DONE_MASK)

12