Home
last modified time | relevance | path

Searched refs:CASPER_AREG_REG_VALUE_MASK (Results 1 – 25 of 27) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S06/
DLPC55S06.h6006 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6011 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S04/
DLPC55S04.h6006 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6011 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/
DLPC55S26.h5851 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5856 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/
DLPC55S28.h5850 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5855 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S16/
DLPC55S16.h6438 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6443 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S14/
DLPC55S14.h6437 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6442 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/
DLPC55S66_cm33_core1.h5851 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5856 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DLPC55S66_cm33_core0.h5851 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5856 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/
DLPC55S69_cm33_core1.h5850 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5855 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DLPC55S69_cm33_core0.h5850 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5855 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6763 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6768 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_cm33.h6763 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
6768 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1766 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
1769 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DMIMXRT595S_cm33.h7983 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
7986 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7979 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
7982 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7982 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
7985 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/
DMIMX8UD7_dsp1.h4903 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4906 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DMIMX8UD7_dsp0.h4986 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4989 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DMIMX8UD7_cm33.h5312 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5315 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/
DMIMX8UD3_cm33.h5312 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5315 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DMIMX8UD3_dsp0.h4986 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4989 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/
DMIMX8UD5_cm33.h5312 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
5315 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
DMIMX8UD5_dsp0.h4986 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4989 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/
DMIMX8US5_dsp0.h4986 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4989 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/
DMIMX8US3_dsp0.h4986 #define CASPER_AREG_REG_VALUE_MASK (0xFFFFFFFFU) macro
4989 … (((uint32_t)(((uint32_t)(x)) << CASPER_AREG_REG_VALUE_SHIFT)) & CASPER_AREG_REG_VALUE_MASK)

12