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Searched refs:CAN_IMASK1_BUF31TO0M_MASK (Results 1 – 25 of 97) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h561 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
564 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K118_FLEXCAN.h553 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
556 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K116_FLEXCAN.h553 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
556 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K142W_FLEXCAN.h566 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
569 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K146_FLEXCAN.h566 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
569 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K142_FLEXCAN.h562 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
565 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K144_FLEXCAN.h566 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
569 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
DS32K144W_FLEXCAN.h566 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
569 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h720 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
725 (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h1221 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
1227 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
1504 #define CAN_IMASK1_BUFLM_MASK CAN_IMASK1_BUF31TO0M_MASK
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h459 #define CAN_IMASK1_BUF31TO0M_MASK FLEXCAN_IMASK1_BUF31TO0M_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2170 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2176 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2170 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2176 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h5552 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
5558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
5962 #define CAN_IMASK1_BUFLM_MASK CAN_IMASK1_BUF31TO0M_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h5552 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
5558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
5966 #define CAN_IMASK1_BUFLM_MASK CAN_IMASK1_BUF31TO0M_MASK
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h2555 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
2558 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h4779 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
4782 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h4781 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
4784 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h4856 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
4859 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h4938 #define CAN_IMASK1_BUF31TO0M_MASK (0xFFFFFFFFU) macro
4941 … (((uint32_t)(((uint32_t)(x)) << CAN_IMASK1_BUF31TO0M_SHIFT)) & CAN_IMASK1_BUF31TO0M_MASK)

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