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Searched refs:CAN_ESR2_VPS_MASK (Results 1 – 25 of 110) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h668 #define CAN_ESR2_VPS_MASK (0x4000U) macro
671 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K118_FLEXCAN.h660 #define CAN_ESR2_VPS_MASK (0x4000U) macro
663 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K116_FLEXCAN.h660 #define CAN_ESR2_VPS_MASK (0x4000U) macro
663 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K142W_FLEXCAN.h682 #define CAN_ESR2_VPS_MASK (0x4000U) macro
685 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K146_FLEXCAN.h678 #define CAN_ESR2_VPS_MASK (0x4000U) macro
681 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K142_FLEXCAN.h674 #define CAN_ESR2_VPS_MASK (0x4000U) macro
677 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K144_FLEXCAN.h678 #define CAN_ESR2_VPS_MASK (0x4000U) macro
681 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
DS32K144W_FLEXCAN.h682 #define CAN_ESR2_VPS_MASK (0x4000U) macro
685 …S(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h940 #define CAN_ESR2_VPS_MASK (0x4000U) macro
946 #define CAN_ESR2_VPS(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h600 #define CAN_ESR2_VPS_MASK FLEXCAN_ESR2_VPS_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h1323 #define CAN_ESR2_VPS_MASK (0x4000U) macro
1329 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2326 #define CAN_ESR2_VPS_MASK (0x4000U) macro
2332 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2326 #define CAN_ESR2_VPS_MASK (0x4000U) macro
2332 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h4506 #define CAN_ESR2_VPS_MASK (0x4000U) macro
4512 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h5273 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5279 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h5315 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5321 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h5302 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5308 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h5674 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5680 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h5674 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5680 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h2720 #define CAN_ESR2_VPS_MASK (0x4000U) macro
2726 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h2720 #define CAN_ESR2_VPS_MASK (0x4000U) macro
2726 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h2720 #define CAN_ESR2_VPS_MASK (0x4000U) macro
2726 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h5310 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5316 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h5361 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5367 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h5361 #define CAN_ESR2_VPS_MASK (0x4000U) macro
5367 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR2_VPS_SHIFT)) & CAN_ESR2_VPS_MASK)

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