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Searched refs:CAN_ESR1_FRMERR_MASK (Results 1 – 25 of 109) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h477 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
480 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K118_FLEXCAN.h469 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
472 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K116_FLEXCAN.h469 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
472 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K142W_FLEXCAN.h473 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
476 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K146_FLEXCAN.h477 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
480 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K142_FLEXCAN.h473 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
476 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K144_FLEXCAN.h477 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
480 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
DS32K144W_FLEXCAN.h473 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
476 …) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan.h477 … CAN_ESR1_ACKERR_MASK | CAN_ESR1_CRCERR_MASK | CAN_ESR1_FRMERR_MASK | CAN_ESR1_STFERR_MASK),
534 kFLEXCAN_FormError = CAN_ESR1_FRMERR_MASK, /*!< Form Error. */
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h570 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
576 … CAN_ESR1_FRMERR(x) (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h366 #define CAN_ESR1_FRMERR_MASK FLEXCAN_ESR1_FRMERR_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h1147 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
1153 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2086 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
2092 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2086 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
2092 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h4344 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
4350 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h5084 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5090 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h5126 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5132 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h5113 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5119 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h5468 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5474 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h5468 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5474 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h2423 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
2429 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h2423 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
2429 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h2423 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
2429 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h5121 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5127 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h5172 #define CAN_ESR1_FRMERR_MASK (0x800U) macro
5178 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_FRMERR_SHIFT)) & CAN_ESR1_FRMERR_MASK)

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