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Searched refs:CAN_ESR1_BIT0ERR_FAST_MASK (Results 1 – 25 of 93) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h547 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
550 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K118_FLEXCAN.h539 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
542 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K116_FLEXCAN.h539 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
542 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K142W_FLEXCAN.h543 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
546 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K146_FLEXCAN.h547 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
550 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K142_FLEXCAN.h543 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
546 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K144_FLEXCAN.h547 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
550 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
DS32K144W_FLEXCAN.h543 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
546 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan.h474 CAN_ESR1_BIT0ERR_FAST_MASK | CAN_ESR1_BIT1ERR_FAST_MASK | CAN_ESR1_ERROVR_MASK |
528 kFLEXCAN_FDBit0Error = CAN_ESR1_BIT0ERR_FAST_MASK, /*!< Unable to send dominant bit. */
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h687 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
694 (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h436 #define CAN_ESR1_BIT0ERR_FAST_MASK FLEXCAN_ESR1_BIT0ERR_FAST_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA156/
DMCXA156.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA154/
DMCXA154.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA155/
DMCXA155.h2535 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
2541 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h4742 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4748 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h4744 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4750 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h4819 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4825 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h4901 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4907 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h4823 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4829 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXW716C/
DMCXW716C.h4190 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
4196 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/
DMCXN236.h6698 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
6704 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/
DMCXN235.h6680 #define CAN_ESR1_BIT0ERR_FAST_MASK (0x40000000U) macro
6686 … (((uint32_t)(((uint32_t)(x)) << CAN_ESR1_BIT0ERR_FAST_SHIFT)) & CAN_ESR1_BIT0ERR_FAST_MASK)

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