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Searched refs:CAN_CTRL2_MRP_MASK (Results 1 – 25 of 112) sorted by relevance

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/hal_nxp-latest/imx/drivers/
Dflexcan.c364 CAN_CTRL2_REG(base) |= CAN_CTRL2_MRP_MASK; in FLEXCAN_SetMatchPrioCmd()
366 CAN_CTRL2_REG(base) &= ~CAN_CTRL2_MRP_MASK; in FLEXCAN_SetMatchPrioCmd()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_FLEXCAN.h634 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
637 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K118_FLEXCAN.h626 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
629 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K116_FLEXCAN.h626 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
629 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K142W_FLEXCAN.h648 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
651 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K146_FLEXCAN.h644 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
647 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K142_FLEXCAN.h640 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
643 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K144_FLEXCAN.h644 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
647 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
DS32K144W_FLEXCAN.h648 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
651 …(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/drivers/flexcan/
Dfsl_flexcan.c2509 …TRL2 = (pRxFifoConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP_MASK) : in FLEXCAN_SetRxFifoConfig()
2510 … (base->CTRL2 | CAN_CTRL2_MRP_MASK); in FLEXCAN_SetRxFifoConfig()
2586 …ase->CTRL2 = (pConfig->priority == kFLEXCAN_RxFifoPrioHigh) ? (base->CTRL2 & ~CAN_CTRL2_MRP_MASK) : in FLEXCAN_SetEnhancedRxFifoConfig()
2587 … (base->CTRL2 | CAN_CTRL2_MRP_MASK); in FLEXCAN_SetEnhancedRxFifoConfig()
/hal_nxp-latest/s32/mcux/devices/S32K344/
DS32K344_device.h874 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
880 #define CAN_CTRL2_MRP(x) (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/s32/mcux/devices/S32Z270/
DS32Z270_device.h556 #define CAN_CTRL2_MRP_MASK FLEXCAN_CTRL2_MRP_MASK macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV11Z7/
DMKV11Z7.h1292 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
1298 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/
DMKE18F16.h2286 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
2292 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/
DMKE16F16.h2286 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
2292 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12/
DMK22F12.h4475 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
4481 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK24F12/
DMK24F12.h5233 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5239 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h5275 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5281 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h5262 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5268 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h5634 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5640 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h5634 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5640 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA146/
DMCXA146.h2674 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
2680 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA145/
DMCXA145.h2674 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
2680 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXA144/
DMCXA144.h2674 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
2680 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h5270 #define CAN_CTRL2_MRP_MASK (0x40000U) macro
5276 … (((uint32_t)(((uint32_t)(x)) << CAN_CTRL2_MRP_SHIFT)) & CAN_CTRL2_MRP_MASK)

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