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Searched refs:CACHE64_CTRL_CSAR_PHYADDR31_29 (Results 1 – 9 of 9) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h1081 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
DMIMXRT685S_cm33.h6389 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6389 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1446 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
DMIMXRT595S_cm33.h7594 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h7590 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h7593 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h13392 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h13392 #define CACHE64_CTRL_CSAR_PHYADDR31_29(x) (((uint32_t)(((uint32_t)(x)) << CACHE64_CTRL_CSAR_… macro