Searched refs:CAAM_SMVID_LS_PSIZ_MASK (Results 1 – 12 of 12) sorted by relevance
14485 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14487 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14488 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14490 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14176 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14178 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14173 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14175 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14188 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14190 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14191 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14193 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14497 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14499 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14500 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14502 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14503 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14505 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14505 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14507 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
14502 #define CAAM_SMVID_LS_PSIZ_MASK (0x70000U) macro14504 … (((uint32_t)(((uint32_t)(x)) << CAAM_SMVID_LS_PSIZ_SHIFT)) & CAAM_SMVID_LS_PSIZ_MASK)
