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Searched refs:CAAM_RTIC_DID_RTIC_ICID_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h11719 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11721 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
DMIMXRT1175_cm7.h11722 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11724 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h11410 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11412 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
DMIMXRT1165_cm4.h11407 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11409 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h11722 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11724 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h11422 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11424 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
DMIMXRT1166_cm7.h11425 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11427 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h11731 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11733 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
DMIMXRT1173_cm7.h11734 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11736 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h11737 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11739 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h11739 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11741 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)
DMIMXRT1176_cm4.h11736 #define CAAM_RTIC_DID_RTIC_ICID_MASK (0x3FF80000U) macro
11738 … (((uint32_t)(((uint32_t)(x)) << CAAM_RTIC_DID_RTIC_ICID_SHIFT)) & CAAM_RTIC_DID_RTIC_ICID_MASK)