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Searched refs:CAAM_CC2MR_ICV_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h16809 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16815 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
DMIMXRT1175_cm7.h16812 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16818 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h16500 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16506 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
DMIMXRT1165_cm4.h16497 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16503 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h16812 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16818 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h16512 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16518 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
DMIMXRT1166_cm7.h16515 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16521 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h16821 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16827 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
DMIMXRT1173_cm7.h16824 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16830 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h16827 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16833 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h16829 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16835 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)
DMIMXRT1176_cm4.h16826 #define CAAM_CC2MR_ICV_MASK (0x2U) macro
16832 … (((uint32_t)(((uint32_t)(x)) << CAAM_CC2MR_ICV_SHIFT)) & CAAM_CC2MR_ICV_MASK)