Searched refs:BME_AND8 (Results 1 – 2 of 2) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/ |
| D | MKW40Z4_extension.h | 2052 #define CMP_CLR_CR0(base, value) (BME_AND8(&CMP_CR0_REG(base), (uint8_t)(~(value))))
2128 #define CMP_CLR_CR1(base, value) (BME_AND8(&CMP_CR1_REG(base), (uint8_t)(~(value))))
2326 #define CMP_CLR_FPR(base, value) (BME_AND8(&CMP_FPR_REG(base), (uint8_t)(~(value))))
2347 #define CMP_CLR_SCR(base, value) (BME_AND8(&CMP_SCR_REG(base), (uint8_t)(~(value))))
2485 #define CMP_CLR_DACCR(base, value) (BME_AND8(&CMP_DACCR_REG(base), (uint8_t)(~(value))))
2563 #define CMP_CLR_MUXCR(base, value) (BME_AND8(&CMP_MUXCR_REG(base), (uint8_t)(~(value))))
2691 #define CMT_CLR_CGH1(base, value) (BME_AND8(&CMT_CGH1_REG(base), (uint8_t)(~(value))))
2715 #define CMT_CLR_CGL1(base, value) (BME_AND8(&CMT_CGL1_REG(base), (uint8_t)(~(value))))
2739 #define CMT_CLR_CGH2(base, value) (BME_AND8(&CMT_CGH2_REG(base), (uint8_t)(~(value))))
2763 #define CMT_CLR_CGL2(base, value) (BME_AND8(&CMT_CGL2_REG(base), (uint8_t)(~(value))))
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/drivers/ |
| D | fsl_bitaccess.h | 64 #define BME_AND8(addr, wdata) (*(volatile uint8_t*)((uintptr_t)addr | BME_AND_MASK) = wdata) macro
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