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Searched refs:BLK_CTRL_SAIMCLK_HIGHBITMASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_misc.h21 #define BLK_CTRL_SAIMCLK_HIGHBITMASK (0x3U) macro
54 temp = base->SAI3_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
59 temp = base->SAI2_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
64 …temp = base->SAI4_MCLK_CTRL & ~((uint32_t)BLK_CTRL_SAIMCLK_HIGHBITMASK << (uint32_… in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_misc.h21 #define BLK_CTRL_SAIMCLK_HIGHBITMASK (0x3U) macro
54 temp = base->SAI3_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
59 temp = base->SAI2_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
64 …temp = base->SAI4_MCLK_CTRL & ~((uint32_t)BLK_CTRL_SAIMCLK_HIGHBITMASK << (uint32_… in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_misc.h21 #define BLK_CTRL_SAIMCLK_HIGHBITMASK (0x3U) macro
54 temp = base->SAI3_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
59 temp = base->SAI2_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
64 …temp = base->SAI4_MCLK_CTRL & ~((uint32_t)BLK_CTRL_SAIMCLK_HIGHBITMASK << (uint32_… in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_misc.h21 #define BLK_CTRL_SAIMCLK_HIGHBITMASK (0x3U) macro
54 temp = base->SAI3_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
55 base->SAI3_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
59 temp = base->SAI2_MCLK_CTRL & ~(BLK_CTRL_SAIMCLK_HIGHBITMASK); in BLK_CTRL_SetSaiMClkClockSource()
60 base->SAI2_MCLK_CTRL = ((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) | temp; in BLK_CTRL_SetSaiMClkClockSource()
64 …temp = base->SAI4_MCLK_CTRL & ~((uint32_t)BLK_CTRL_SAIMCLK_HIGHBITMASK << (uint32_… in BLK_CTRL_SetSaiMClkClockSource()
65 …base->SAI4_MCLK_CTRL = (((uint32_t)clkSrc & BLK_CTRL_SAIMCLK_HIGHBITMASK) << (uint32_t)mclk) | tem… in BLK_CTRL_SetSaiMClkClockSource()