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Searched refs:BCH_CTRL_RSVD3_MASK (Results 1 – 25 of 46) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h4678 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4682 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h4676 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4680 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h4676 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4680 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h4678 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4682 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h4678 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4682 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h4676 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4680 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
DMIMX8MN6_ca53.h4705 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
4709 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h6362 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6366 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD7/
DMIMX8MD7_cm4.h6362 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6366 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MD6/
DMIMX8MD6_cm4.h6362 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6366 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h2045 #define BCH_CTRL_RSVD3_MASK 0xF800u macro
2047 …x) (((uint32_t)(((uint32_t)(x))<<BCH_CTRL_RSVD3_SHIFT))&BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ6/
DMIMX8MQ6_cm4.h6362 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6366 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ7/
DMIMX8MQ7_cm4.h6362 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6366 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/imx/devices/MCIMX7D/
DMCIMX7D_M4.h2100 #define BCH_CTRL_RSVD3_MASK 0xF800u macro
2102 …x) (((uint32_t)(((uint32_t)(x))<<BCH_CTRL_RSVD3_SHIFT))&BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h10846 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
10849 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
DMIMX8QM6_dsp.h11010 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
11013 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
DMIMX8MM6_ca53.h3724 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3728 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h3694 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
3698 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h6147 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6151 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h6147 #define BCH_CTRL_RSVD3_MASK (0xF800U) macro
6151 … (((uint32_t)(((uint32_t)(x)) << BCH_CTRL_RSVD3_SHIFT)) & BCH_CTRL_RSVD3_MASK)

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