Searched refs:AWRSR (Results 1 – 14 of 14) sorted by relevance
| /hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/ |
| D | S32Z2_QUADSPI.h | 107 __I uint32_t AWRSR; /**< AHB Write Status Register, offset: 0x120 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_hifi1.h | 63486 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT735S_cm33_core1.h | 63555 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT735S_ezhv.h | 92340 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT735S_cm33_core0.h | 87714 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core1.h | 66778 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT758S_hifi1.h | 66707 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT758S_cm33_core0.h | 90939 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT758S_ezhv.h | 96112 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/ |
| D | MIMXRT798S_hifi1.h | 66707 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT798S_cm33_core1.h | 66778 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT798S_hifi4.h | 90838 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT798S_cm33_core0.h | 90939 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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| D | MIMXRT798S_ezhv.h | 96136 __I uint32_t AWRSR; /**< AHB Write Status, offset: 0x120 */ member
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