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Searched refs:AUX1PLLCLKDIV (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c232 …return CLOCK_GetSysPfdFreq(kCLOCK_Pfd3) / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MAS… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c232 …return CLOCK_GetSysPfdFreq(kCLOCK_Pfd3) / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MAS… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_clock.c530 …return CLOCK_GetT3PllMci213mClkFreq() / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MASK)… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_clock.c530 …return CLOCK_GetT3PllMci213mClkFreq() / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MASK)… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c213 …return CLOCK_GetSysPfdFreq(kCLOCK_Pfd3) / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MAS… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c213 …return CLOCK_GetSysPfdFreq(kCLOCK_Pfd3) / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MAS… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c213 …return CLOCK_GetSysPfdFreq(kCLOCK_Pfd3) / ((CLKCTL0->AUX1PLLCLKDIV & CLKCTL0_AUX1PLLCLKDIV_DIV_MAS… in CLOCK_GetAux1PllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h1262 __IO uint32_t AUX1PLLCLKDIV; /**< aux1 pll clk divider, offset: 0x24C */ member
DMIMXRT685S_cm33.h6973 __IO uint32_t AUX1PLLCLKDIV; /**< aux1 pll clk divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h6973 __IO uint32_t AUX1PLLCLKDIV; /**< aux1 pll clk divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h1948 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL Clock Divider, offset: 0x24C */ member
DMIMXRT595S_cm33.h8186 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL Clock Divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h8182 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL Clock Divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h8185 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL Clock Divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h19973 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL clock divider, offset: 0x24C */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h19973 __IO uint32_t AUX1PLLCLKDIV; /**< AUX1 PLL clock divider, offset: 0x24C */ member