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Searched refs:AUDIOPLLCLKDIV (Results 1 – 16 of 16) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_clock.c315 …return CLOCK_GetAudioPfdFreq(kCLOCK_Pfd0) / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_clock.c315 …return CLOCK_GetAudioPfdFreq(kCLOCK_Pfd0) / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/drivers/
Dfsl_clock.c535 …return CLOCK_GetAvPllCh1Freq() / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV_MASK) + 1U… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/drivers/
Dfsl_clock.c535 …return CLOCK_GetAvPllCh1Freq() / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV_MASK) + 1U… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.c297 …return CLOCK_GetAudioPfdFreq(kCLOCK_Pfd0) / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.c297 …return CLOCK_GetAudioPfdFreq(kCLOCK_Pfd0) / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.c297 …return CLOCK_GetAudioPfdFreq(kCLOCK_Pfd0) / ((CLKCTL1->AUDIOPLLCLKDIV & CLKCTL1_AUDIOPLLCLKDIV_DIV… in CLOCK_GetAudioPllClkFreq()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h2734 __IO uint32_t AUDIOPLLCLKDIV; /**< audio pll0 clock divider, offset: 0x240 */ member
DMIMXRT685S_cm33.h8464 __IO uint32_t AUDIOPLLCLKDIV; /**< audio pll0 clock divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h8464 __IO uint32_t AUDIOPLLCLKDIV; /**< audio pll0 clock divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h4124 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL Clock Divider, offset: 0x240 */ member
DMIMXRT595S_cm33.h10381 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL Clock Divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h10377 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL Clock Divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h10380 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL Clock Divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW610/
DRW610.h21423 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL0 clock divider, offset: 0x240 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/RW612/
DRW612.h21423 __IO uint32_t AUDIOPLLCLKDIV; /**< Audio PLL0 clock divider, offset: 0x240 */ member