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Searched refs:ASRC_ASRRB_ASRRA_H_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8QM6/
DMIMX8QM6_ca53.h6599 #define ASRC_ASRRB_ASRRA_H_MASK (0x3F0000U) macro
6602 … (((uint32_t)(((uint32_t)(x)) << ASRC_ASRRB_ASRRA_H_SHIFT)) & ASRC_ASRRB_ASRRA_H_MASK)
DMIMX8QM6_dsp.h6763 #define ASRC_ASRRB_ASRRA_H_MASK (0x3F0000U) macro
6766 … (((uint32_t)(((uint32_t)(x)) << ASRC_ASRRB_ASRRA_H_SHIFT)) & ASRC_ASRRB_ASRRA_H_MASK)
DMIMX8QM6_cm4_core1.h5218 #define ASRC_ASRRB_ASRRA_H_MASK (0x3F0000U) macro
5220 … (((uint32_t)(((uint32_t)(x)) << ASRC_ASRRB_ASRRA_H_SHIFT)) & ASRC_ASRRB_ASRRA_H_MASK)
DMIMX8QM6_cm4_core0.h5218 #define ASRC_ASRRB_ASRRA_H_MASK (0x3F0000U) macro
5220 … (((uint32_t)(((uint32_t)(x)) << ASRC_ASRRB_ASRRA_H_SHIFT)) & ASRC_ASRRB_ASRRA_H_MASK)