Searched refs:APLLNDIV (Results 1 – 16 of 16) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/drivers/ |
| D | fsl_clock.c | 1729 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
1730 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2104 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/drivers/ |
| D | fsl_clock.c | 1729 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
1730 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2104 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/drivers/ |
| D | fsl_clock.c | 2143 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
2144 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2531 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/drivers/ |
| D | fsl_clock.c | 2143 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
2144 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2531 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/drivers/ |
| D | fsl_clock.c | 2143 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
2144 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2531 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/drivers/ |
| D | fsl_clock.c | 2143 SCG0->APLLNDIV = pSetup->pllndiv; in CLOCK_SetPLL0Freq()
2144 SCG0->APLLNDIV = pSetup->pllndiv | (1UL << SCG_APLLNDIV_NREQ_SHIFT); /* latch */ in CLOCK_SetPLL0Freq()
2531 preDiv = SCG0->APLLNDIV & SCG_APLLNDIV_NDIV_MASK; in findPll0PreDiv()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN236/ |
| D | MCXN236.h | 52418 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN235/ |
| D | MCXN235.h | 52376 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN546/ |
| D | MCXN546_cm33_core0.h | 63997 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| D | MCXN546_cm33_core1.h | 63997 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN547/ |
| D | MCXN547_cm33_core0.h | 63997 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| D | MCXN547_cm33_core1.h | 63997 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN947/ |
| D | MCXN947_cm33_core1.h | 64744 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| D | MCXN947_cm33_core0.h | 64744 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MCXN946/ |
| D | MCXN946_cm33_core0.h | 64744 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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| D | MCXN946_cm33_core1.h | 64744 __IO uint32_t APLLNDIV; /**< APLL N Divider Register, offset: 0x50C */ member
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